Substrate for electronic packaging, pin jig fixture

ABSTRACT

A substrate for electronic packaging, the substrate having a discrete, generally prismatoid, initially electrically conductive valve metal solid body with one or more spaced apart, original valve metal vias each individually electrically islolated by a porous oxidized body portion therearound. A pin jig fixture for mechanically masking a metal surface, the pin jig fixture having an anodization resistant bed of pins each pin having a leading end surface for intimate juxtaposition against a metal surface to mask portions thereof.

FIELD OF THE INVENTION

This invention relates to substrates for electronic packaging includinginter alia ball grid array packaging (BGA), chip size/scale package(CSP) and multi-chip/module packaging (MCP/CM), and a process ofmanufacturing therefor. In addition, the invention relates to a fire formasking purposes, and a process using the fixture for preparing aselectively patterned valve metal surface.

BACKGROUND OF THE INVENTION

Conventional electronic packaging includes a discrete substrate on whichone or more integrated circuit chips (ICCs) are mounted on its topside,for example. in the case of BGA, as illustrated and described in U.S.Pat. No. 5,355,283 to Marrs et al. The discrete substrate can be of awide range of materials including inter alia aluminum and irrespectiveof its material, through holes are drilled between its topside andunderside. In the case of an aluminum substrate, each hole is initiallyanodized to create an insulating sleeve prior to the insertion of ametal pin, thereby enabling electrical and thermal communication betweenits topside and underside.

Depending on the intended complexity of an electronic package, amulti-layer interconnect structure can be interdisposed between the ICCsand the substrate, for example, as illustrated and described in U.S.Pat. No. 5,661,341 to Neftin. Such a multi-layer interconnect structurehas one or more aluminum layers, each layer being deposited on apreviously prepared topside and typically having a thickness in theorder of between about 0.5 μm and about 20 μm.

Conventional masking for area selective anodization purposes is arelatively complicated and expensive process including the applicationand subsequent removal of an inert masking layer using photolithographyand deposition techniques, the layer being in the form of a photomaterial, a dense oxide layer, a tantalum metal thin film, and the like.

SUMMARY OF THE INVENTION

In accordance with a first aspect of the present invention, there isprovided a substrate for electronic packaging, the substrate comprisinga discrete, generally prismatoid, initially electrically conductivevalve metal solid body with a pair of opposing major surfaces, said bodyhaving one or more original valve metal filled vias substantiallyperpendicular to said major surfaces, said filled vias being spacedapart and individually electrically isolated by a porous oxidized bodyportion therearound.

A substrate in accordance with the present invention can be fabricatedfrom suitable valve metal blanks of aluminum, titanium, or tantalum, andpreferably inter alia Al5052, Al5083, Al1100, Al1145, and the like. Sucha substrate can be readily manufactured to customer requirements interms of a desired filled via pattern; electrical properties; therelative proportions of the original valve metal filled vias and theporous oxidized body portions; thermo-mechanical properties such asthermal coefficient of expansion (TCE), substrate strength. Youngmodulus, elasticity; thermal properties such as thermal conductivitycoefficient, and other factors. Such a substrate can be manufacturedwith a minimum filled via diameter of about 25 μmm and a minimum centerto center distance between adjacent filled vias of about 50 μm, therebyaffording high miniturization and high fluency operation of electronicpackaging.

In accordance with a second aspect of the present invention, there isprovided a process for manufacturing a discrete substrate fur electronicpackaging, the process comprising the steps of:

(a) providing a discrete, generally prismatoid, initially electricallyconductive valve metal, solid blank having a pair of opposing majorsurfaces, the blank having a plurality of spaced apart generallycylindrical through sections, each through section having end surfacesand extending substantially perpendicular to the pair of opposing majorsurfaces;

(b) selectively masking both end surfaces of one or more of the throughsections; and

(c) porously oxidizing the blank whereupon a porous oxidized portionforms around a through section whose both end surfaces are maskedthereby retaining the through section as an original metal valve filledvia.

A process of manufacturing a discrete substrate for electronic packagingin accordance with the present invention involves a low number of stepsand is suitable for Be area panel production. During or post anodizationsuitable can be impregnated into the blank's oxidized portions whichtypically thicken and therefore require planarization to restore them totheir original thickness.

The porous anodization can be either one- or two-sided depending on thethickness of the generally cylindrical through sections some of whichare to be retained as original valve metal filled vias. Typically,one-sided porous anodization can be applied to a maximum through sectionthickness of about 150 μm whilst two-sided porous anodization can beapplied to a maximum through section thickness of about 300 μm. One- andtwo-sided porous anodization can be effected in a conventional manner,for example, as illustrated and described in U.S. Pat. No. 5,661,341 toNeftin.

In accordance with a third aspect of the present invention, there isprovided a pin jig fixture for mechanically masking a valve metalsurface, the pin jig comprising an anodization resistant bed of pinseach having a leading end surface for intimate juxtaposition against aportion of the metal surface whereby said portion is masked.

A pin jig fixture in accordance with the present invention enables thesimultaneous masking of one or more portions of a valve metal surface byits mechanical clamping thereagainst. Typically, the pins have planarend surfaces which are co-planar, however, a jig pin fixture can havepins of different lengths whereby their end surfaces lie on differentparallel planes. The bed of pins can be fabricated from any suitableanodization resistant material including ceramics, valve metals, and thelike.

The pin jig fixture can be preferably employed to directly oxidize thosenon-masked portions immediately surrounding the metal surface portionsmasked thereby, in which case, the pins are fabricated from valve metaland have electrically conductive end surfaces connectable to a powersource. In addition, the pin jig fixture advantageously negates the needfor an otherwise redundant portion of a substrate, such portionconventionally being initially used for connection to an electricalsource and which is subsequently removed.

In accordance with a fourth aspect of the present invention, there isprovided a process for preparing a selectively patterned valve metalsurface, the process comprising the steps of:

(a) providing a pin jig fixture having an anodization resistant bed ofpins each having a leading end surface;

(b) intimately juxtaposing leading end surfaces against a valve metalsurface to mask portions thereof; and

(c) anodizing the masked metal surface.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to understand the invention and to see how it may be carriedout in practice, preferred embodiments will now be described, by way ofnon-limiting examples only, with reference to the accompanying drawings,in which:

FIG. 1 is a pictorial view of a finished discrete aluminum substrate inaccordance with a first embodiment of the present invention;.

FIG. 2 is a cross section view of the substrate of FIG. 1 along lineA—A;

FIG. 3 is a pictorial view showing the porous oxidization of a blankduring the manufacture of the substrate of FIG. 1;

FIGS. 4-6 correspond to FIGS. 1-3 for a finished discrete aluminumsubstrate in accordance with a second embodiment of the presentinvention;

FIGS. 7-9 correspond to FIGS. 1-3 for a finished discrete aluminumsubstrate in accordance with a third embodiment of the presentinvention;

FIGS. 10-12 correspond to FIGS. 1-3 for a finished discrete aluminumsubstrate in accordance with a fourth embodiment of the presentinvention;

FIG. 13 is a perspective view of a pin jig fixture in accordance withthe present invention;

FIG. 14 is a cross section view of the pin jig fixture of FIG. 13 alongline E-E; and

FIG. 15 is a side view showing the mechanical clamping of a substrate bytwo pin jig fixtures of Fixture 13.

DETAILED DESCRIPTION OF THE DRAWINGS

In the drawings, different materials during the process of manufacturinga device of the present invention are shown in different shading, thedifferent materials including aluminum metal, porous aluminum oxide, anda mask. In addition, porous anodization is illustrated by arrows withcurly tails.

With reference now to FIGS. 1-3, a device 1 for use as a BGA supportstructure, and MCM support structure, a CSP support structure and thelike has a discrete solid body 2 with opposing generally parallel majorsurfaces 3 and 4. The solid body 2 has a sealed or unsealed porousaluminum oxide body portion 6 with a pair of exterior surfaces 7 and 8constituting portions of the major surfaces 3 and 4, respectively. Thebody portion 6 has an array of one or more electrically insulatedinverted frusto-conical aluminum vias 9 embedded therein. Each aluminumvia 9 constitutes an electrically insulated original valve metalconductive trace and has exterior surfaces 12 and 13 constitutingportions of the major surfaces 3 and 4, respectively. The device 1 ismanufactured from an aluminum blank 14 with a full mask 16 applied toits major surface 3 and an array 17 of circular masking elements 18corresponding to the array of aluminum vias 9 applied to its majorsurface 4 prior to its undergoing one stage one-sided porousanodization. A typical device 1 has the following specification: h=100μm, b=300 μm, d₁=75 μm, and d₂=150 μm.

Turning now to FIGS. 4-6, a device 21 is similar to the device 1 of FIG.1 and differs therefrom in that it is thicker and that the vias 9 arebarrel shaped, namely, each aluminum via 9 initially diverges andthereafter converges from an exterior surface 24 constituting a portionof the major surface 3 to an exterior surface 26 constituting a portionof the major surface 4. The device 21 is manufactured from aluminumblank 27 with two identical arrays 17 applied to its major surfaces 3and 4 prior to its undergoing one stage dual-sided porous anodization. Atypical device 21 has the following specification: h=200 μm, b=0.3 mm,d₁=120 μm, and d₂ =150 μm.

Turning now to FIGS. 7-9, a device 28 is similar to the device 1 of FIG.1 and differs therefrom in that it is manufactured from an aluminumblank 29 having an array of thin regions 32, each thin region 32 beingatop a frusto-conical shaped recess 33. The aluminum blank 29 undergoesone stage one-sided porous anodization in a similar fashion to thealuminum blank 14 of FIG. 3 so as to form an array of aluminum vias 9 inthe thin regions 32 and whereby electrically insulated aluminum pockets34 are also formed. A typical device 28 has the following specification:h1=500 μm, h2=100 μm, b=1000 μm, d1=100 μm, and d2=150 μm.

Turning now to FIGS. 10-12, a device 36 is similar to the device 28 ofFIG. 7 and differs therefrom in that it has a thicker thin portions 32thereby requiring one stage dual-sided porous anodization in a similarfashion to the blank 27 of FIG. 6 which leads to an array ofbarrel-shaped aluminum vias 9. A typical device 36 has the followingspecification: h₁=500 μm, h₂=200 μm, b=1000 μm, d₁=150 μm, and d₂=200μm.

Turning now to FIGS. 13-15, a pin jig fixture 121 for use with anelectrical power source (PS) 122 for porous anodization of a valve metalblank 123 with a surface 124 includes a bed of cone shaped pins 126. Thebed of pins 126 is made from titanium and is directly connected to thepower source 122. Each pin 127 has a leading end surface 128 forintimate juxtaposition against the surface 124 for connection of theblank 123 to the power source 122. During porous anodization, all theunderside surface of the pin jig fixture 121 including the peripheralsurfaces 129 of the pins 127 is converted into dense titanium oxidewhilst all its interior including the cores 131 of the pins 127 remaintitanium such that the pin jig Ore 121 is suitable for multiple porousanodizations.

A single pin jig fixture 121 can be employed in one-sided porousanodization, for example, to selectively pattern aluminum blanks 14 and27 in the manufacture of discrete aluminum substrates 1 and 28,respectively. Or a pair of fact-to-face pin jig fixtures 121 can beemployed in two-sided porous anodization, for example, to selectivelypattern aluminum blank 29 in the manufacture of discrete aluminumsubstrates 21 and 36, respectively.

While the invention has been described with respect to a limited numberof embodiments, it will be appreciated that many variations,modifications, and other applications of the invention can be made.

What is claimed is:
 1. A substrate for use in electronic packaging, thesubstrate consisting of a discrete, non-layered, solid body having apair of generally parallel major surfaces and having one or moreelectrically insulated original valve metal vias substantiallyperpendicularly disposed to said major surfaces and at least partiallysurrounded by porous valve metal oxide based material, each via havingexposed end surfaces substantially co-directional with said majorsurfaces, the substrate being formed only from a non-layered originalvalve metal solid blank having major surfaces with a distancetherebetween equal to a distance between the substrate's major surfaces,by a single process of porous anodization of said blank with the blank'smajor surfaces being masked, at least one of the blank's major surfacesbeing masked selectively, for converting portions of said blank thatwere non-masked at least at one of the blank's major surfaces intoporous valve metal oxide and thereby retaining portions of said blankthat were masked at both of the blank's major surfaces as said one ormore electrically insulated original valve metal vias.
 2. A substrateaccording to claim 1, wherein a via has a generally diverging crosssection therealong and a maximum thickness between said end surfaces ofbetween about 25 μm and about 150 μm.
 3. A substrate according to claim1, wherein a via has a barrel shaped cross section area therealong and amaximum thickness between said end surfaces of between about 25 μm andabout 150 μm.
 4. A substrate according to claims 1, 2 or 3, wherein saidsolid body has one or more recesses in one of said major surfacesinwardly extending toward the other of said major surfaces therebyforming a corresponding number of thin portions, at least one of saidthin portions constituting an electrically insulated original valvemetal via.
 5. A substrate according to claim 4 wherein non-recessedportions have a thickness between said major surfaces from about 200 μmto about 10 mm.
 6. A substrate according to claim 4 wherein a recess hasa frusto-conical shape.
 7. A substrate according to claim 1, whereinboth major surfaces of said blank are masked selectively for said singleprocess of porous anodization.
 8. A process for manufacturing asubstrate having a desired product specification for use in electronicpackaging, the process consisting only of the steps of: (a) providing adiscrete valve metal non-layered solid blank having a pair of opposinggenerally parallel major surfaces; (b) covering both said major surfacesof the non-layered solid blank with masks, in accordance with thedesired product specification, at least one of said major surfaces beingmasked selectively; (c) porously anodizing the masked non-layered solidblank for converting portions of said blank that were non-masked atleast at one of the blank's major surfaces into porous valve metal oxidematerial and thereby retaining portions of said blank that were maskedat both said blank's major surfaces as one or more electricallyinsulated original valve metal vias embedded in said porous valve metaloxide material; and (d) removing said masks from both said majorsurfaces.
 9. A process according to claim 8, wherein one major surfaceof the blank is fully masked, whereby the blank undergoes one-sidedporous anodization, wherein a distance between the major surfaces of theblank has a maximal value between about 25 μm and about 150 μm.
 10. Aprocess according to claim 9, wherein said vias have a cross-sectionalarea diverging away from at least one of said major surfaces.
 11. Aprocess according to claim 8, wherein both said major surfaces of saidblank are masked selectively, whereby the blank undergoes two-sidedporous anodization, wherein a distance between the major surfaces of theblank has a maximal value between about 25 μm and about 300 μm.
 12. Apin jig fixture for mechanically masking a metal surface, the pin jigfixture being connected to an electrical power source and comprising abed of pins each having a leading end surface for intimate juxtapositionagainst the metal surface for masking a corresponding area thereof, oneor more of said leading end surfaces being directly connected to theelectrical power source for electrically connecting the electrical powersource to the metal surface on intimate juxtaposition thereagainst. 13.A pin jig fixture according to claim 12 wherein said bed of pins isformed from an electrically conductive metal based material.
 14. A pinjig fixture according to claim 13, wherein said bed of pins is formedfrom an anodization resistant valve metal based material.
 15. A pin jigfixture according to claim 12, wherein the leading end surfaces of saidbed of pins are substantially co-planar.
 16. A pin jig fixture accordingto claim 12, wherein said pins are of two or more different lengths. 17.A process for preparing a selectively masked valve metal surface, theprocess comprising the steps of: (a) providing a pin jig fixturecomprising a bed of pins each having a leading end surface, one or moreof said leading end surfaces being coupled with one or more electricalpower source connection points; (b) intimately juxtaposing the leadingend surfaces of the bed of pins against a valve metal surface to mask acorresponding area of the valve metal surface; (c) electricallyconnecting the pin jig fixture to an electrical power source, therebyelectrically connecting the electrical power source to the correspondingmasked area of the valve metal surface; and (d) porously anodizing thevalve metal surface.
 18. A substrate for use in electronic packaging,the substrate comprising a discrete, non-layered solid body having apair of generally parallel major surfaces and having one or moreelectrically insulated original valve metal vias diverging inwardly awayfrom at least one of said major surfaces and at least partiallysurrounded by porous valve metal oxide based material, each via havingexposed end surfaces substantially co-directional with said majorsurfaces, the substrate being form, only from an original valve metalnon-layered solid blank by a single process of porous anodization ofsaid blank.
 19. A substrate according to claim 18, wherein said viasdiverge inwardly away from both said major surfaces.